[Oberon] Negative integer literals in Oberon

[Jörg]

One of the new features in Oberon-SA was the base type RIDER, a special case of POINTER TO ARRAY

RIDERs are useful, if the CPU offers special pre/post increment/decrement.

 

In e.g. Oberon-07 you write something like

 

VAR s, x, y: REAL; ra, rb, limit: POINTER TO REAL;

BEGIN

   s := 0.0; ra := SYSTEM.ADR(a); rb:= SYSTEM.ADR(b); limit := ra + n*4;

   WHILE ra < limit DO

      SYSTEM.GET(ra, x); SYSTEM.GET(rb, y);

      s := x * y + s; INC(ra, 4) INC(rb, 4)

   END

 

With RIDERS it looks like this:

VAR s: REAL; ra, rb, limit: RIDER REAL;

BEGIN

   s := 0.0; SET(ra, a, 0); SET(rb, b, 0); SET(limit, a, n);

   WHILE ra < limit DO s := ra^ * rb^ + s END;

 

This is not existing in Oberon-07 as the RISC5 CPU does not offer the autoincrement feature.

 

br

Jörg

 

 

Von: Oberon <oberon-bounces at lists.inf.ethz.ch> im Auftrag von Nemo Nusquam <cym224 at gmail.com>
Antworten an: ETH Oberon and related systems <oberon at lists.inf.ethz.ch>
Datum: Dienstag, 28. April 2020 um 17:13
An: <oberon at lists.inf.ethz.ch>
Betreff: Re: [Oberon] Negative integer literals in Oberon

 

On 04/28/20 10:03, Skulski, Wojciech wrote (in part):
> Not quite so if you are serving some hardware.

Speaking of h/w and f/w, was the model helicopter flight control ever ported to Oberon-07?  

In Niklaus Wirth, "A Computer System for Model Helicopter Flight Control", Technical Memo Nr. 6: The Oberon Compiler for the 
Strong-ARM Processor, 1999, we find the following in the conclusion.

An important advantage of designing one's own compiler is that specific, perhaps machine−dependent facilities can easily be incorporated. Such facilities are required if, for example, specific resources must be accessible, such as processor status register, memory management registers, or device interfaces. This is typically the case for embedded applications, which also require a predictable performance for real−time sensing and control. 

N.


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