[Oberon] Re (n): Hardware;

peter at easthope.ca peter at easthope.ca
Mon May 4 18:23:05 CEST 2020

From:	=?UTF-8?B?SsO2cmc=?= <joerg.straube at iaeth.ch>
Date:	Mon, 4 May 2020 09:31:28 +0200
I had a quick look. I don't know exactly but ...

From:	Paul Reed <paulreed at paddedcell.com>
Date:	Mon, 04 May 2020 08:43:03 +0100
> ... this was really bothering me ...

Good.  If the explanation isn't absolutely obvious to you fellows, I 
don't feel so dense.  =8~)

> 1) HW generates an interrupt and the Intel CPU reacts
> 2) the Oberon OS gets the interrupt and dispatches it to your interrupt handler
> 3) your interrupt routine does the thing you want it to be done to handle the interrupt and returns normally to the Oberon OS.
> 4) The Oberon OS does some clean up and returns from the interrupt

Apparently multiple states of the stack are shown in one picture.  I 
should try to expand.  Then subject to your scrutiny.  (I can't help 
but think of Rutherford's quip; me being the bartap.  
https://en.wikiquote.org/wiki/Ernest_Rutherford )

Thanks,                     ... P.

Tel: +1 604 670 0140            Bcc: peter at easthope. ca

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