[Oberon] Project Oberon running from LPDDR memory on Pipistrello

[Jörg]

Tomas

There were some enhancements
- FPMultiplier 8.8.2016
- FPDivider 16.9.2016
- FPAdder 4.10.2016
- RISC5 31.8.2018, a little speedier ALU implementation in RISC5, Interrupt..

Perhaps it would be worth upgrading to the newest Verilogs

Jörg

> Am 11.05.2020 um 13:14 schrieb Tomas Kral <thomas.kral at email.cz>:
> 
> On Mon, 11 May 2020 11:54:40 +0200
> Jörg <joerg.straube at iaeth.ch> wrote:
> 
>> Tomas
>> What floating point modules do you have in your build? Very old ones
>> had a rounding error. Jörg
> 
> ==> FPAdder.v <==
> `timescale 1ns / 1ps  // NW 20.9.2015  pipelined
> // u = 1: FLT; v = 1: FLOOR
> 
> ==> FPDivider.v <==
> `timescale 1ns / 1ps   // NW 18.9.2015
> 
> ==> FPMultiplier.v <==
> `timescale 1ns / 1ps  // NW 15.9.2015
> 
> ORB.Mod.txt:MODULE ORB;   (*NW 25.6.2014  / 4.4.2017  in Oberon-07*)
> ORG.Mod.txt:MODULE ORG; (* NW  18.4.2016 / 4.4.2017  code generator in Oberon-07 for RISC*)
> ORP.Mod.txt:MODULE ORP; (*N. Wirth 1.7.97 / 4.4.2017  Oberon compiler for RISC in Oberon-07*)
> ORS.Mod.txt:MODULE ORS; (* NW 19.9.93 / 20.3.2017  Scanner in Oberon-07*)
> System.Mod.txt:MODULE System; (*JG 3.10.90 / NW 12.10.93 / NW 20.6.2016*)
> 
> -- 
> Tomas Kral <thomas.kral at email.cz>
> --
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