[Oberon] How much RAM? Was: PO2013 - Texts
joerg.straube at iaeth.ch
Mon Jun 15 11:59:01 CEST 2020
A fair question.
First of all you would need to decide whether the board should run a full system (with keyboard, mouse and display = inner and outer core). Or is it for an embedded system (without keyboard, mouse and display = inner core only)
Let's assume you decide for the full operating system.
As we did not port all LinzOberon Oberon-2 code to Oberon-07 yet, it's difficult to answer your question, how much code the whole system will need.
A quick and dirty sum of all Obj and Sym files of LinzOberon reveals 3.4 MB.
Some remarks to this number:
- the 3.4 MB covers ALL files. But not all are needed for a working system. You don't run all LinzOberon code at once.
- I tried to select all files that - in my point of view - are needed to run a base system (I left out the whole Kepler framework, all different compilers, Fonteditor, Bitmaps and quite a few other module but included quite some text elem code) --> The sum is ~600 KB.
- this 3.4MB is for Intel CPU. Unfortunately, I have no rule of thumb how more or less dense RISC5 code is.
- the 3.4 MB is for SW only. Memory for data / heap has to be added.
- the 3.4 MB does not include the frambuffer. I guess for a new board, it would be a wise decision to have separate memory for the frame buffer (even think of a different memory type). With such a design, the screen refresh (VID.v) has no influence on the CPU's memory bandwidth.
I could imagine that 4 MB DRAM (SW and data) should do. And 1MB for a separate framebuffer (e.g. 1024 x 768 x 256 colors, DRAM or SRAM).
The new HW only makes sense if
- somebody writes the Verilog for the new board (RISC5Top.v and all HW drivers needed)
- somebody enables the Oberon system on top of this HW layer
- somebody ports the LinzOberon source to Oberon-07. Or adapts the Modula-2 compiler to generate RISC5 code.
- Or somebody implements the RISC-V softcore instead of NW's RISC5. And writes a RISC-V compiler (either Oberon-07 or Oberon-2)
Am 14.06.20, 04:44 schrieb "Oberon im Auftrag von Skulski, Wojciech" <oberon-bounces at lists.inf.ethz.ch im Auftrag von skulski at pas.rochester.edu>:
> However, adding "text elems" like in Linz Oberon is the biggy here. It does indeed
> add a fair amount of complexity to TextFrames and (probably) requires more RAM.
Probably. This can be quantified under an emulator. How much RAM one really needs? Two megs? Four? Knowing this number would put a constraint on the board design. If four megs are sufficient then either ASRAM or ZBT can do and one can still get away w/o a cache. More than four would require DRAM and then a cache is necessary.
Choosing the board would be better founded if we knew how much RAM is needed to run Linz V4 and ETH System-3. Then at least we could say "this board can run this system, but it cannot run the other one". At this point we are only guessing. The answer can be found with an emulator where you can declare the amount of RAM.
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