[Oberon] Project Oberon, RISC-V Edition
chris at cfbsoftware.com
Mon Dec 7 05:38:47 CET 2020
> -----Original Message-----
> From: Oberon [mailto:oberon-bounces at lists.inf.ethz.ch] On Behalf Of
> Skulski, Wojciech
> Sent: Monday, 7 December 2020 1:46 PM
> To: ETH Oberon and related systems
> Subject: Re: [Oberon] [EXT] Project Oberon, RISC-V Edition
> > And there is always the FPGA route to consider.
> Speaking of RISC-V and FPGA, someone (Peter Matthias I think) once
> said that Artix-7 100T is sufficient to run a soft version of RISC-V.
> I also recall seeing such statements somewhere on the RISC-V sites.
> If this is true, and if you are happy with the soft RISC-V, then you
> can order RiskFive with Artix 100-T from me. You will need to pay for
> the production run, but this is peanuts. A couple thousand or so.
> Then you will have your FPGA board and the production files. If the
> board goes under at my end, then you can still repeat the production
> runs basically forever.
> Other possible boards include Arty-7 with Artix-7 100T from Digilent.
> It has more memory, but it is DDR3, so you will need a much more
> complex firmware. But you need to do it once. Also, you can perhaps
> find an EE intern or two who can interface DDR3 for you.
There's an article on Digi-Key's site showing how to implement a version of
RISC-V on the Arty A7-100:
alternatively via TinyURL:
FYI you can also use the Arty A7-100 board to run the official Project
Oberon Workstation using entirely off-the-shelf parts i.e. Digilent's VGA,
SDCard and PS/2 PMOD boards and cables. I succeeded in implementing this
recently using only the BRAM that is on the Artix-7 100T board running at a
clock speed 50% higher than normal (i.e. 37.5 MHz). As this means that the
total RAM available is only 512 KB (instead of the usual 1 MB) this does
present some challenges. However, it is possible to use the system to
compile itself, using all of the standard Project Oberon modules from Prof
Wirth's site, even with the limited memory that is available.
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