[Oberon] Re (2): Documentation;

[peter at easthope.ca]

From:	=?utf-8?Q?J=C3=B6rg?= <joerg.straube at iaeth.ch>
Date:	Thu, 17 Dec 2020 00:59:11 +0100
> I hope my explanation helped a little and does not confuse.

Makes perfect sense.  I read about fixup a few years back and by now 
had almost forgotten about the procedure offset list of the loader.  
Review helps recall.

Still not sure about the instructions.  ...

From:	Hellwig Geisse <hellwig.geisse at mni.thm.de>
Date:	Wed, 16 Dec 2020 23:15:17 +0100
> pno = procedure number (in the list of exported procedures
> of the module mno)

OK, "procedure" rather than "program".  Absent mindedness.

> V is one of the modifier bits of instructions with format
> F1: Â 01uv a b op im
> Â  Â  Â  Â 4 Â 4 4 Â 4 16
> So it's bit 28.

Bit 28 counting from the right.  (Why not 3 from the left?)

> > with 16 v-bits to the left.

Would this wording be better?
"When bit v is 1, im is extended with an additional 16 bits. Thereby 
allowing im a total of 32 bits."

Where are the additional 16 bits?

> BL is "branch and link", aka "call". The condition
> is coded in the four bits following. "pc-fixorgP"
> gives the distance to the next fixup in the chain.

I'd never guess BL = "branch and link".  In fact I searched 
Risk-Arch.pdf and RISK.pdf and didn't find it. Can these acronyms 
be read somewhere?  Only in lectures notes?

RISC-Arch, page 2 has this.
3. Branch instruction   (Format F3)
   | 110v | cond | 16 bits | 0000 | c |
F3 | 111v | cond |         off        |

The branch instruction has two forms according to the value of u. 
u is bit 29 counting from the right.

This was cited by Andreas. 

| BL (4) | cond (4) | mno (4) | pno (8) | pc-fixorgP (12) |

Which is not conformant to either F3 until fixed up to the following.

| BL (4) | cond (4) | offset relative to PC (24) |

Conformant to the second F3.  Correct?

Thanks,                       ... L.


-- 
Tel: +1 604 670 0140            Bcc: peter at easthope. ca