[Oberon] [EXT] Project Oberon 2013 on RISC-V

D EMARD vordah at gmail.com
Mon Dec 21 13:14:12 CET 2020


Yes lattice ecp5 with sdram.

for ulx3s ecp5 there is project ported from fleafpga (also ecp5)
https://github.com/emard/oberon
it is slightly un-clean with interventions in the core but
works if compiles with closedsource tools diamond or
opensource yosys/trellis tools

Technically any ecp5 with sdram could run this oberon
with some fiddling

There is cleanup project but not yet ready for general use:
https://gitlab.com/pnru/ulx3s-misc/-/tree/master/oberon_pnr
it's still very part-depended timing-critical so works only on
author's board.

I'm currently trying to make a simple python script
for file transfer with pclink1 protocol


On 12/21/20, Paul Reed <paulreed at paddedcell.com> wrote:
>> What kind of FPGA will be needed to run this version of Project Oberon?
>
> Lattice ECP5, right, Davor? ;-)
>
> Cheers,
> Paul
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon
>


More information about the Oberon mailing list