[Oberon] Undocumented FP feature in RISC5

Hellwig Geisse hellwig.geisse at mni.thm.de
Thu Jan 21 10:27:09 CET 2021

Hi all,

while working on a re-implementation of RISC5,
I stumbled over a feature of the floating-point
adder, which is not documented in the paper "The
RISC Architecture" (dated NW 5.12.10, rev. 9.8.2018),
not even in section 4 (Special Features).

The FP adder is able to perform the conversion
functions REAL->INTEGER ("FLOOR" in Oberon) and
INTEGER->REAL ("FLT" in Oberon). These operations
are choosen on the basis of the u- and v-bits of
the format part of the instruction, which in this
case is "FAD".

A quick look into ORG.Mod (the code generator of
the compiler) reveals that these instructions are
indeed generated (ORG.Floor, ORG.Float), and thus
must be implemented in hardware; otherwise, the
compiler back-end must be changed.


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