[Oberon] [EXT] Re: Emulating interrupts in oberon-risc-emu as in the RISC5 specification

[Charles Perkins]

My understanding is that it is a 2018 addition to the SYSTEM package (e.g.
system dependent) and was included in the ORG module of the compiler at
that time as a procedural wrapping of the STI/CLI RISC5 machine
instructions.

The RTI/CLI macine instructions are described in
https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC-Arch.pdf section 5
-- Interrupts.

At the same time the compiler gained the ability to recognize an interrupt
procedure marked by an asterisk, compiled with a different prologue and
with an epilogue ending in the RTI machine instruction instead of the usual
RTS.

An architecture other than RISC5 (RISCV for example, or ARM, or X86) may
include different mechanisms for enabling or disabling interrupts and for
setting and updating interrupt vectors, if interrupts are to be supported
at all, so I think SYSTEM is the right place for LDPSR (or an equivalent)
rather than the language report.

Best Regards,
Chuck

On Tue, Mar 30, 2021 at 8:52 PM Skulski, Wojciech <skulski at pas.rochester.edu>
wrote:

> Joerg:
>
> what is SYSTEM.LDPSR? It does not seem to be present in the language
> report dated Revision 1.10.2013 / 3.5.2016, which I just downloaded from
> Paul's website.
>
> Wojtek
>
>
> ________________________________________
> From: Oberon [oberon-bounces at lists.inf.ethz.ch] on behalf of Jörg [
> joerg.straube at iaeth.ch]
> Sent: Tuesday, March 30, 2021 8:45 PM
> To: ETH Oberon and related systems
> Subject: [EXT] Re: [Oberon] Emulating interrupts in oberon-risc-emu as in
> the RISC5 specification
>
> Although TestInt is low-level, it should use Kernel.Install
> (SYSTEM.ADR(Int), 4) to make it a little bit less low-level😀
>
> This little wrapper makes interrupts a little bit better consumable:
> MODULE Interrupts; (* jr/31mar21 *)
> IMPORT S := SYSTEM, Kernel;
> PROCEDURE Install*(handler: PROCEDURE);
>   BEGIN Kernel.Install(S.ADR(handler), 4) END Install;
> PROCEDURE Set*(on: BOOLEAN);
>   BEGIN S.LDPSR(ORD(on)) END Set;
> END Interrupts.
>
> With it TestInt.Mod gets
> MODULE TestInt;
> IMPORT Interrupts;
> VAR led, cnt: INTEGER;
> PROCEDURE* MyInterrupt;
>   BEGIN
>     INC(cnt); IF cnt = 500 THEN led := 3-led; LED(led); cnt := 0 END
>   END MyInterrupt;
> PROCEDURE On*; BEGIN Interrupts.Set(TRUE) END On;
> PROCEDURE Off*; BEGIN Interrupts.Set(FALSE) END Off;
> BEGIN
>   led := 1; cnt := 0; Interrupts.Install(MyInterrupt)
> END
> TestInt.On
> TestInt.Off
>
> Interrupts.Mod could be enhanced servicing multiple interrupt handlers.
> Comparable to the background tasks in Oberon.Mod. This enhancement would
> install its own interrupt handler doing the scheduling, and the user‘s
> „interrupt handlers“ are normal procedures without * marking of the
> procedure. You would then install your handler like this
> PROCEDURE MyTask; BEGIN led := 3 - led; LED(led) END MyTask;
> BEGIN led := 1; Interrupts.Install(MyTask, 500) END TestInt.
>
> br, Jörg
>
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon
>
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