[Oberon] Stimulus driven interrupts?

Joerg joerg.straube at iaeth.ch
Fri May 7 08:36:01 CEST 2021



In addition to Chris’ reply. Here a minimum implementation of Install*(handler: PROCEDURE); 

      SYSTEM.LDPSR(0);                                                                   (* disable/clear interrupt *)

      Kernel.Install(SYSTEM.VAL(INTEGER, handler), 4);      (* install the interrupt handler at memory address 4 *)

      SYSTEM.LDPSR(1);                                                                   (* enable/set interrupt *)


LDPSR is the abbreviation for “load processor status register”. The last bit of this status register is “interrupt: on/off”


As interrupts begin and end differently than “normal” procedures, and it has bad consequences if you install a “normal” procedure as interrupt handler, I decided to check that the parameter “handler” is really an interrupt procedure. To do this I check the procedure’s prolog. Here the start of the prolog (=the code the compiler generates when it sees a BEGIN)
  normal proc:                  interrupt proc:
  SUB SP SP localsize       SUB SP SP localsize
  STW LNK SP 0                STW R0 SP 0

  ….                                    …


The first instruction is the same but the second instruction differs.


      SYSTEM.LDPSR(0);                                                                                   (* disable/clear interrupt *)

      Kernel.Install(SYSTEM.ADR(Empty), 4);                                           (* see below *)

      SYSTEM.GET(SYSTEM.VAL(INTEGER, handler)+4, instr);           (* get second instruction of the “handler” code. If “handler” is NIL the check below is never true *)

      IF instr = 0A0E00000H THEN (* valid interrupt handler *)       (* check for STW R0 SP 0 *)

        Kernel.Install(SYSTEM.VAL(INTEGER, handler), 4);                   (* install interrupt handler at memory address 4 *)

        SYSTEM.LDPSR(1)                                                                                  (* enable/set interrupt *)



The “Empty” interrupt is a precaution in case the programmer’s interrupt handler is not valid or NIL and the programmer would code a SYSTEM.LDPSR(1) on his own after Install(). I could put this code in the ELSE.


Instead of SYSTEM.GET(SYSTEM.VAL(INTEGER, handler)+4, instr);  the compiler would also accept the shorter SYSTEM.GET(ORD(handler)+4, instr);

As the Oberon report does not define ORD() on procedure variables, I use the “official” way of doing it.





Von: Oberon <oberon-bounces at lists.inf.ethz.ch> im Auftrag von Jeff Maggio <jmaggio14 at gmail.com>
Antworten an: ETH Oberon and related systems <oberon at lists.inf.ethz.ch>
Datum: Donnerstag, 6. Mai 2021 um 22:20
An: <oberon at lists.inf.ethz.ch>
Betreff: [Oberon] Stimulus driven interrupts?


Gray - that would be fantastic! I'd love to look more into it
Jorg - thank you, that module simplifies things a lot. Would it be possible for you to walk me through how it works in more detail? I'm not following every line - for instance what does SYSTEM.LDPSR do?
Adding to Jörg's post, below, I have a simple eight channel interrupt controller in the FPGA hardware as "front end" to the single interrupt of the RISC5 CPU, including the corresponding Oberon driver of course. It adds one clock cycle of latency, IIRC. Let me know if you're interested. It requires some minor changes to the RISC5 CPU, though.
-- gray
On Thu, 6 May 2021, at 19:53, Joerg wrote:
> Hi Jeff
> The interrupt signal is handed over by the HW to the RISC5 CPU in RISC5Top.v.
> The interrupt signal in the CPU is called .irq, and the current RISC5Top.v hands over periodic interrupts with the Verilog code below
> RISC5 riscx(.clk(clk), .rst(rst), *.irq(limit),*
>    .rd(rd), .wr(wr), .ben(ben), .stallX(vidreq),
>    .adr(adr), .codebus(codebus), .inbus(inbus),
>         .outbus(outbus));
> assign limit = (cnt0 == 24999);
> But you are totally free to set the CPU’s .irq signal on other HW conditions, e.g. a packet on the Ethernet board arrived or the temperature sensor says the meat is tender.
> Below I attached an older mail on an “simple” API to facilitate programming with interrupts. Instead of Kernel.Install you would call Interrupt.Install to install the interrupt handler.
> br
> Jörg

-- Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems https://lists.inf.ethz.ch/mailman/listinfo/oberon 

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