[Oberon] Re (2): UEFI

[Liam Proven]

On Tue, 15 Jun 2021 at 16:55, <peter at easthope.ca> wrote:
>
> > What backdoor problem is this?
>
> https://en.wikipedia.org/wiki/Intel_Management_Engine

Aha! Right. That is an entirely unrelated issue. The Intel ME is a
totally separate processor, embedded in the CPU, which sets up and
manages the main processor and some of the hardware. In older Intel
processors (Core/Core 2 series) it was an ARC RISC core running
ThreadX -- the same embedded RTOS that's in the Raspberry Pi GPU. Now
it's an x86 core running Minix 3. It's mainly intended for remote
management of servers -- so that you can connect to them over the
network, tell them to wake from sleep (Wake On LAN), reboot a server
even with a hung OS, shut them down, stuff like that.

It's not possible to completely get rid of it, but it can be stripped
down to its core which has no remaining functionality.

This is nothing to do with UEFI at all.

AMD has a different but comparable system as well.


> > Is it [Oberon on the Skulski machines] not already?
>
> V5 might work now. Fairly sure that none of V4, ETH Oberon and A2 work
> yet.

Aha!

By "V5" you mean Project Oberon, the 2013 version, on RISC-5?

A2 is my primary interest, I would say.

AIUI Oberon V4 only runs on top of other OSes, and there is no
"native" bare-metal version.

In re the RasPi, there are 2 main current families: the RasPi Zero,
which is a single-core ARM machine with 1GB of RAM, and the RasPi 3
and 4, which are 4-core machines with between 1 and 8 GB of RAM.

 I was thinking of ETH Oberon or V5 for the RasPi Zero, as they are
single-core machines with less storage, and A2 for the multi-core
models.

I have been wondering if there was anything that could be reused from
Ultibo, as this contains FOSS FreePascal code to control the USB,
Ethernet and display of the RasPi Zero and 3/3+ models.

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