[Oberon] FPGA Oberon some news and a reply to F.P.

eas lab lab.eas at gmail.com
Tue Mar 4 07:10:42 CET 2014

Coming from hardware: transistors -> registers -> 8bitUprocs ... I was
uncomfortable with NativeOberon's clunky handling of bytes via <systemChar>
and shiftLeft/Right stuff.

PASCAL / Modula / Oberon were never intended to directly access bytes in
absolute-addressed memory [yes Hex.Tool is nice]; but it would be good to
build a little domain-language for this-project's Oberon.

N-O has got a substantial <scheme based design/drawing program>, for example;
compared to which a minimal assembler..etc. would be trivial.

Decades ago, I needed an assembler for a Motorola CPU.
So instead of using *THEIR* syntax eg. ldi A, #N
  load byte immediate into A register = #N -> A;
I used: #N->A , directly as the syntax.

Why write "seven" when "7" is more direct?

The value of being able to 'extend' one OS/language with others, is well
demonstrated by eg:
 Linux [which has the big community to make drivers which ETHZ can't afford
 to build] supports
  ETHO, which can call *nix utilties, and
   for really difficult problems that need 6 frames open on 1 screen, and
   ability to colour related text/concepts, only ETHO can do,
the combination is powerful.

==Chris Glur.

On 3/3/14, Aubrey.McIntosh at alumni.utexas.net
<Aubrey.McIntosh at alumni.utexas.net> wrote:
> The bitcoin miners used Spartan 6 units, and they are being abandoned now
> that ASICs are available.  I wonder if these would be useful?
> On Sun, Mar 2, 2014 at 4:20 AM, greim <greim at schleibinger.com> wrote:
>> Some news from my FPGA Oberon board:
>> Yesterday i was also able to compile the Verilog code from the source to
>> the Bit-File. That was a big progress for me.
>> I really hope that several hundreds will follow up! Also guys who are
>> more professional then i am.
>> I thinks this Project Oberon, or i prefer FPGA Oberon is a real great
>> and also NEW system!
>> If we you are thinking about the success of Arduinio and Rasberry PI
>> which are much less innovative, then i am not so pessimistic about the
>> future of Oberon.
>> Maybe the fathers of the project should communicate this to Xilinx or
>> maybe Altera . I could imagine that a Oberondinio or a Garnetberry OB
>> ;-)  would be a realistic thing.
>> As first small project and proof of concept, i personally like to
>> realize a kind of oscilloscope.
>> This requires:
>> -  in Verilog: the ADC converter handling and a ring buffer, with some
>> trigger mechanism.
>> - in Oberon: line graphic and a small user interface for showing the
>> signals.
>> > Still; compare the readabilty of the code of the rs232 driver written
>> > in
>> > verilog with one written in vhdl
>> >
>> > verilog
>> >
>> http://www.inf.ethz.ch/personal/wirth/ProjectOberon/SourcesVerilog/RS232R.v
>> >
>> > VHDL
>> >
>> http://opencores.org/websvn,filedetails?repname=rs232_interface&path=%2Frs232_interface%2Ftrunk%2Fuart.vhd
>> >
>> > Greets and happy coding,
>> > F.P.
>> >
>> >
>> mmm, if VHDL or Verilog in principle is better readable i can't evaluate
>> in details. Both languages are hard to understand, at least for me, and
>> VHDL for me is still more abstract then Verilog.
>> One general thing is, that the Verilog code as well as the Oberon code
>> of ProjectOberon is "poor of comments" as everybody can see at your RS
>> 232 examples.
>> I know that Nicklaus Wirth says: "the code must explain itself", and
>> also the book is explaining many things very well, but at some corners,
>> some comments would be sometimes very helpful...
>> Markus
>> --
>> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
>> https://lists.inf.ethz.ch/mailman/listinfo/oberon
> --
> Aubrey McIntosh, Ph.D.
> 211 E. 5th St.
> Morris MN 56267
> (512)-348-7401

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