joerg.straube at iaeth.ch
Tue Apr 15 15:26:43 CEST 2014
Depends on the definition of "emulated" vs "implemented" :-)
Couldn't you do the following analogy?
Verliog code = PdWs emulator code
Verilog tools = C compiler
Spartan 3 = host environment
From: Paul Reed [mailto:paulreed at paddedcell.com]
Sent: Dienstag, 15. April 2014 15:10
To: ETH Oberon and related systems
Subject: Re: [Oberon] RISC5
> By definition, Project Oberon works on the imaginary RISCv5.
> NW emulated his RISCv5 on an FPGA HW
> PdW emulated the RISCv5 in C and SDL on arbitrÃ¤ry HW
> Short: Project Oberon is ALWAYS emulated as there is no real RISCv5 HW.
That's rubbish. The RISC5 is implemented in hardware.
Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
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