[Oberon] Verilog module generator - porting Oberon-07 'V5' to another FPGA module
lab.eas at gmail.com
Mon May 12 12:32:33 CEST 2014
Motivation: Anyone who has needed to integrate a few Verilog modules
into something working, knows it's a headache. It's not only a
mechanic task, but also a source of bugs. Since Verilog modules'
interface is basically wires, the integration task requires an
accurate understanding of what each wire stands for, and how it's
expected to behave. Having many details to keep track on, it's common
that undesidered ...
That sounds like the kind of task, that needs the power of ETHO's
where you need 6 files visible together, and all 'lined up'; not
scattered M$ style,
pretending to be papers. With the ultimate heavy-artillery of being
able to selectively
color related parts, via merely 2 'strokes'
== Chris Glur.
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