[Oberon] OP2 for 64 bit ARM and/or RISC5

Paul Reed paulreed at paddedcell.com
Wed Jan 20 17:43:20 CET 2016


> Any chance for the RISC5 version of OP2? Oberon-wise it could make an
> impact. Why is OP2 not available for RISC5 which has been intentionally
> developed to make the life easy for the compiler writer? Lack of OP2 for
> RISC5 is proving the opposite.

That's rubbish, it proves nothing of the sort.  Prof. Wirth did indeed
develop RISC5 to make it easier to implement a clear Oberon(-07) compiler.
 And with only 22 instructions, RISC5 is certainly a very sensible
starting point (I can't think of a better one) for building a compiler
from scratch (or porting one, or buiding an emulator, for that matter). 
These things have been done.  But how does any of that relate to OP2,
which was not developed by Wirth?


> I an constantly scratching my head over lack of Oberon-2 and OPP2 for
> RISC5. How it can be so? Design a processor to prove how easy it is to
> develop the compiler, and then refuse to develop the compiler? Where is
> the logic?

I worry about you having a sore scalp then, because you certainly have a
very particular/fixed point of view!  But seriously, how would such a
project be justified?  As asked before, are you offering money to have
someone spend time on it?  These kinds of things can take a huge amount of
time, when you get down to the details.

For example, RISC5 has no halfword support.  How would you handle
portability of code (e.g. 16-bit INTEGER) to other Oberon-2
implementations, something which others have told me is absolutely
critical.  (To get round these issues myself, I tend to code to a sort of
common subset of Oberon-07 and Oberon-88.  And as a compiler implementor I
sure don't miss type inclusion!).

HTH,
Paul




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