[Oberon] FPGA Oberon - Modules.rsc

Jörg joerg.straube at iaeth.ch
Wed Mar 22 17:18:25 CET 2017

Yes indeed, these are RISC instructions.

The Oberon source of the bootloader (aka BIOS) is here:



This file contains different versions of the bootloader (disk and line, line-only…)





From: Oberon [mailto:oberon-bounces at lists.inf.ethz.ch] On Behalf Of thomas.kral at email.cz
Sent: Mittwoch, 22. März 2017 15:41
To: ETH Oberon and related systems <oberon at lists.inf.ethz.ch>
Subject: Re: [Oberon] FPGA Oberon - Modules.rsc


Hi Andreas,


Thank you, nice work of yours!


In the chapter 14.2 it hints that linker is almost identical to `Modules.Mod' loader, except it links statically into a file, rather than into memory.


Addresses are relocated with origin 0H, from a fixed start of Oberon partition?


I also found found some  boot linking modules in native oberon souce files.




Was I close?


What would be also  interesting to decompose `prom.mem' to understand how this file could be produced.

It seems to have 361 lines each ascii encoded long word. Ends with C7000000, lines 362-490 are zeros .

Are these RISC machine instructions?



Many thanks





---------- Původní zpráva ----------
Od: Andreas Pirklbauer < <mailto:andreas_pirklbauer at yahoo.com> andreas_pirklbauer at yahoo.com>
Komu: ETH Oberon and related systems < <mailto:oberon at lists.inf.ethz.ch> oberon at lists.inf.ethz.ch>
Datum: 22. 3. 2017 11:36:35
Předmět: [Oberon] FPGA Oberon - Modules.rsc


The book Project Oberon does not describe the way the inner core itself is built (it only mentions that a “boot linker”is needed for that) or loaded onto the boot area of the local disk, nor are the tools to accomplish this published.
A minimal set of the Oberon building tools can be found at:


   ORP.Compile Kernel.Mod FileDir.Mod Files.Mod Modules.Mod ~

   Linker.Link Modules    # prepare inner core (pre-linked binary)

   Builder.Build Modules  # load inner core into boot area of disk

thomas.kral at email.cz thomas.kral at email.cz 
Tue Mar 21 09:13:34 CET 2017

Hi Joerg,
I was rereading the chapter 14 again, I realise the boot over RS232 is 
triggered by a switch, but I still do miss the point, how do I build the 
inner core, and Oberon0. In the text there is a reference to boot linker. 
Many thanks
---------- Původní zpráva ----------
Od: Jörg <joerg.straube at iaeth.ch <https://lists.inf.ethz.ch/mailman/listinfo/oberon> >
Komu: ETH Oberon and related systems <oberon at lists.inf.ethz.ch <https://lists.inf.ethz.ch/mailman/listinfo/oberon> >
Datum: 21. 3. 2017 8:06:54
Předmět: Re: [Oberon] FPGA Oberon - Modules.rsc
The inner core is at a fixed location on the disk.
The boot process is described in chapter 14.1:


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