[Oberon] FPGA - Colour Support

Tomas Kral thomas.kral at email.cz
Sun Oct 8 16:06:23 CEST 2017

Hi Joerg, Wojtek, Magnus, All,

Thanks for all your posts and recommendations.
- 2MB of RAM, something I plan by chip piggy back, while driving upper
  meg with CS, from `Verilog' code.
- overclock to 30MHz

As I have got `Pepino' board with 1MB, and 25Mhz, this can make an
interesting exercise for students.

What I need to solve however first, is how to map b&w screen
in memory completely separate from colour bit planes. This would allow
using `Display.Mod' unchanged while programming colour logic.

In other words, one bit in memory tells if the display pixel is
illuminated or not, the other bit planes, tell if there are also some
colours to add to it.

In the two designs I have got so far, several bits in memory control RGB
of a single display pixel, this results in seeing entire display buffer
duplicated several times on the monitor.

Tomas Kral <thomas.kral at email.cz>

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