[Oberon] Numeric CASE vs IF THEN ELSE Performance

Chris Burrows chris at cfbsoftware.com
Fri Jun 8 15:27:15 CEST 2018

Following feedback from Prof Wirth I have managed to improve the performance
of the numeric CASE statement  in RISC5 Oberon by implementing a variant of
the Branch Conditional instruction in the RISC5 processor.


The standard branch via register instruction is 

    BR,cond [Rn]


The new variant of this instruction is 

    BR,cond  PC,[Rn] 


i.e. the target of the branch is computed by adding the contents of register
n to the current program counter.


Consequently, the average overhead of any selection in a CASE statement,
including range checking, is now a constant 6 instructions. The average
overhead of any selection in an IF THEN ELSE statement is (N + 1) * 2
instructions. Hence, in situations where there is an equal probability of
each selection occurring CASE is faster than IF whenever there are more than
2 selections.


This latest (v6.4) release of Embedded Project Oberon is based on the
current Project Oberon and Verilog sources from Prof Wirth's site. It's
available for no charge for Saanlima Electronics' Pepino LX9 (Spartan-6)  as
well as Digilent's Arty-S7 (Spartan-7), Arty and Cmod-A7 (Artix-7)
development boards:





Chris Burrows

CFB Software









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