[Oberon] FPGA - Display.CopyBlock()
hellwig.geisse at mni.thm.de
Thu Sep 27 18:32:09 CEST 2018
On Do, 2018-09-27 at 15:59 +0200, Tomas Kral wrote:
> RISC-5 has reduced functionality, I believe in h/w terms it means
> number of flip/flops - transistors used => how much does it influence
> price of of a real chip design based on FPGA matrix, while quantity is
> probably the biggest factor?
the complexity of the core RISC-5 logic is tiny in
comparison with the capacity of modern FPGAs, let
alone ASICs. Example: My implementation of RISC-5
(including the peripheral controllers) occupies less
than 4% of the chip's Logic Elements (and this is
a rather old Cyclone IV E).
Although I'm no expert in FPGA/ASIC economics
I would guess that the functionality of RISC-5
is mostly irrelevant for the cost of the chip.
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