[Oberon] Oberon on ULX3S explanation

Skulski, Wojciech skulski at pas.rochester.edu
Thu Nov 14 02:02:18 CET 2019


> when jumping often to random addresses and fetching small amount
> of data each time, they have less latency and thus work are faster than DDRx

Could you provide some numbers concerning your board? How many nanoseconds have you seen per reading or writing 32-bit words from random SDRAM locations?

Thank you,

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