[Barrelfish-users] Intel SCC latency measurements for MPB operations

[Konstantin Zertsekel]

Hi all,
I am engaged in the project with Intel SCC chip where communication latency
is important factor.
Now, according to RCCE inter-core Ping-Pong test, the minimum latency is 5
microseconds (see this
graph<https://picasaweb.google.com/lh/photo/DP8vsfafDDHqcf_SZGzZMg?feat=directlink>:
https://picasaweb.google.com/lh/photo/DP8vsfafDDHqcf_SZGzZMg?feat=directlink
).
But according to latency table for various memory accesses by Intel (see this
table<https://picasaweb.google.com/lh/photo/j-m4PkXxumRCoCQy3jmAuQ?feat=directlink>:
https://picasaweb.google.com/lh/photo/j-m4PkXxumRCoCQy3jmAuQ?feat=directlink),
the minimum latency (when accessing the local MPB with bypass) is measured
in ~100 clocks, not microseconds.
What is the reason for such a wide gap in RCCE implementation and hardware
latency table?
I guess all kinds of memory access latency measurements is a must-know stuff
for porting Barrelfish to SCC...
Thanks, KostaZ.
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