[Barrelfish-users] Barrelfish for custom tile-based architecture

[Simon Peter]

Hi Bjorn,

There actually was a port of Barrelfish to the Beehive architecture, 
which does not have an MMU. That port is now historical and the code 
removed from the tree. The last release to support it was 2011-11-10 
(http://hg.barrelfish.org/barrelfish/rev/256f62218262) and you should be 
able to look there for hints on how to do a port to an architecture 
without an MMU.

Have fun!
Simon

On 13-08-26 09:17 AM, Bjørn Christian Seime wrote:
> Hi!
>
> We are two Master students from NTNU (Norwegian University of Science 
> and Technology) currently working on a project in which we are to 
> implement a minimal operating system for a simple, experimental 
> architecture[1], preferably by porting Barrelfish. The architecture 
> consists of multiple Amber[2] cores connected in a tile-based 
> architecture. These cores are fairly simple; specifically, they do not 
> have an MMU, or any other hardware mechanisms available for 
> implementing virtual memory or memory protection. The amount of memory 
> is also fairly limited (around 32MB), and there is no hard drive 
> available either to use as backing storage.
>
> In many ways, the architecture seems like a good fit for the 
> multikernel approach used in Barrelfish. However, as (to our 
> knowledge) all the existing ports of Barrelfish have virtual memory 
> support, we are worried as to whether some part of the operating 
> system is relying on its existence. We have read some previous theses 
> on porting Barrelfish to new architectures[3,4,5]; all of them 
> consider the challenges of implementing virtual memory, but none 
> discuss the reliance on it of other parts of the system. As this is 
> something we might not discover until a late stage in the porting 
> process, we figured that consulting the experts who might immediately 
> know of problems we would encounter would be a pragmatic approach. Can 
> you think of any issues which would prohibit porting Barrelfish to 
> this MMU-less environment?
>
> Sincerely,
> Bjorn C. Seime and Benjamin Bjornseth
>
> [1]: http://research.idi.ntnu.no/eecs/shmac
> [2]: http://en.wikipedia.org/wiki/Amber_(processor_core) 
> <http://en.wikipedia.org/wiki/Amber_%28processor_core%29>
> [3]: http://www.diva-portal.org/smash/get/diva2:635212/FULLTEXT01.pdf
> [4]: www.barrelfish.org/scheidegger-bachelor-netronome.pdf? 
> <http://www.barrelfish.org/scheidegger-bachelor-netronome.pdf%E2%80%8E>
> [5]: www.barrelfish.org/hitz-bachelor-multicore-arm.pdf? 
> <http://www.barrelfish.org/hitz-bachelor-multicore-arm.pdf%E2%80%8E>
>
>
>
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