[Barrelfish-users] How to get the wall-clock in Barrelfish?

[Simon Peter]

I don't have it in front of me right now, but there should be a file 
named lut_mapping.vi (or similar) in the obj directory that's created 
after you execute bootscc.sh. That has a listing of all default LUT 
mappings and explanations, which should include the one you're looking for.

Simon

On 13-01-13 09:20 PM, Zhiquan Lai wrote:
> Hi Simon,
>
> Thanks for your advice.
>
> Now I am considering what value* should I write into the LUT entry to 
> map the clock registers.
>
> Each LUT entry contains 10 bits for the upper 10 bits in new memory 
> address, 8 bits for the tile
> destination ID, 3 bits for the destination sub-ID, and 1 bit for MIU 
> bypass.
>
> I still can not find any reference about what should be filled in this 
> bits for that clock registers.
>
> Thanks
> Zhiquan
>
> On Mon, Jan 14, 2013 at 9:26 AM, Simon Peter <speter at inf.ethz.ch 
> <mailto:speter at inf.ethz.ch>> wrote:
>
>         I have figured out the bug and fixed it*. But the 64 bits read
>         from phy
>         addr of 0xf9008224 are always be ZERO, rather than the
>         wall-clock ticks
>         as they said.
>         Should I need to modify the default LUT to map 0xf9008224
>         address to the
>         FPGA clock ? If yes, how to do that ?
>
>
>     I believe, yes, as we didn't bother to map the FPGA pages we
>     didn't touch and this page might be part of that. You can add a
>     mapping in kernel/arch/scc/rck.c, in rck_init(). Feel free to
>     extend X86_32_DEVICE_SPACE_LIMIT for that (there's no hardware limit).
>
>     Simon
>
>

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