[Barrelfish-users] Add clrex when context switching

[Wang Nan]

Hi,

Following patch adds "clrex" instructions in context switching code. CLREX is important
for armv7 spinlock because they are based on ldrex and strex.

diff --git a/kernel/arch/arm/exec.c b/kernel/arch/arm/exec.c
index c6aa0d5..e73e437 100644
--- a/kernel/arch/arm/exec.c
+++ b/kernel/arch/arm/exec.c
@@ -37,6 +37,7 @@ void do_resume(uint32_t *regs)
     cp15_invalidate_i_and_d_caches();

     __asm volatile(
+	"clrex\n\t"
         // lr = r14, used as tmp register.
         // Load cpsr into lr and move regs to next entry (postindex op)
         // LDR = read word from memory
diff --git a/kernel/arch/armv7/exceptions.S b/kernel/arch/armv7/exceptions.S
index fa75dad..14e20af 100644
--- a/kernel/arch/armv7/exceptions.S
+++ b/kernel/arch/armv7/exceptions.S
@@ -261,6 +261,7 @@ null_handler:
         // Set up stack and GOT pointer.
         //
 .macro enter_sys scratch
+	clrex
         mov \scratch, #(CPSR_IF_MASK | ARM_MODE_SYS)
         msr cpsr_c, \scratch
         init_sys_pic_register
diff --git a/lib/barrelfish/arch/arm/debug.c b/lib/barrelfish/arch/arm/debug.c
index e6c4bc6..433142c 100644
--- a/lib/barrelfish/arch/arm/debug.c
+++ b/lib/barrelfish/arch/arm/debug.c
@@ -14,7 +14,7 @@

 void debug_dump(arch_registers_state_t *archregs)
 {
-#define dpr(reg) debug_printf(#reg " %08"PRIu32"\n", archregs->named. reg)
+#define dpr(reg) debug_printf(#reg " %08"PRIx32"\n", archregs->named. reg)
     dpr(r0);    dpr(r1);        dpr(r2);        dpr(r3);
     dpr(r4);    dpr(r5);        dpr(r6);        dpr(r7);
     dpr(rtls);  dpr(r10);       dpr(r11);       dpr(r12);
diff --git a/lib/barrelfish/arch/arm/dispatch.c b/lib/barrelfish/arch/arm/dispatch.c
index 9fbaa45..35effac 100644
--- a/lib/barrelfish/arch/arm/dispatch.c
+++ b/lib/barrelfish/arch/arm/dispatch.c
@@ -47,6 +47,7 @@ static void __attribute__((naked)) __attribute__((noinline))
 disp_resume_context(struct dispatcher_shared_generic *disp, uint32_t *regs)
 {
     __asm volatile(
+	"clrex\n\t"
         /* Re-enable dispatcher */
         "    mov     r2, #0                                             \n\t"
         "    str     r2, [r0, # " XTR(OFFSETOF_DISP_DISABLED) "]        \n\t"
@@ -64,7 +65,8 @@ static void __attribute__((naked))
 disp_save_context(uint32_t *regs)
 {
     __asm volatile(
-        "    mrs     r1, cpsr                                           \n\t"
+	"clrex\n\t"
+	"    mrs     r1, cpsr                                           \n\t"
         "    adr     r2, disp_save_context_resume                       \n\t"
         "    stmib   r0, {r0-r14}                                       \n\t"
         "    str     r1, [r0]                                           \n\t"
diff --git a/lib/barrelfish/arch/arm/syscall.S b/lib/barrelfish/arch/arm/syscall.S
index 8038025..6b3d4cf 100644
--- a/lib/barrelfish/arch/arm/syscall.S
+++ b/lib/barrelfish/arch/arm/syscall.S
@@ -14,6 +14,7 @@
 syscall:
         // Save pointer to return structure (r0), callee-save
 	// registers (r4-r10,r12) that are cloberred.
+	clrex
         mov     r12, sp
         push    {r0, r4-r10, r11, r12, lr, pc}
         ldmia   r12, {r4-r10, r12}