[Barrelfish-users] Make armv7 cpu driver run in SVC mode
Wang Nan
wangnan0 at huawei.com
Mon Jul 15 10:53:20 CEST 2013
Hi,
As I mentioned early, I provide a patch on armv7, which makes cpu driver executes on ARMv7 platform, and fixes
the cpsr clobber problem. This patch should be applied after my CLREX patch.
For all arm platform:
diff --git a/kernel/arch/arm/exec.c b/kernel/arch/arm/exec.c
index e73e437..fdeb1ed 100644
--- a/kernel/arch/arm/exec.c
+++ b/kernel/arch/arm/exec.c
@@ -63,7 +63,11 @@ void do_resume(uint32_t *regs)
/* "ldmia lr!, {r13} \n\t" */
/* // Restore LR and PC */
/* "ldmia lr!, {r14-r15} \n\t" */
- "ldmia %[regs], {r0-r15}^ \n\t"
+ "mov lr, %[regs]\n\t"
+ "ldmia lr, {r0 - lr}^\n\t"
+ "add lr, #4*15\n\t"
+ "ldr lr, [lr]\n\t"
+ "movs pc, lr\n\t"
// Make sure pipeline is clear
"nop \n\t"
"nop \n\t"
@@ -148,7 +152,7 @@ void wait_for_interrupt(void)
// Switch to priviledged mode with interrupts enabled.
__asm volatile(
//"mov r0, #" XTR(ARM_MODE_SYS) " \n\t"
- "mov r0, #" XTR(ARM_MODE_PRIV) " \n\t"
+ "mov r0, #" XTR(ARM_MODE_SVC) " \n\t"
"msr cpsr_c, r0 \n\t"
"0: \n\t"
#if defined(__ARM_ARCH_6K__)
diff --git a/kernel/arch/armv7/exceptions.S b/kernel/arch/armv7/exceptions.S
index 14e20af..e8e403a 100644
--- a/kernel/arch/armv7/exceptions.S
+++ b/kernel/arch/armv7/exceptions.S
@@ -57,11 +57,6 @@ undef_stack:
undef_stack_top:
.space 8, 0
-svc_stack:
- .space EXCEPTION_MODE_STACK_BYTES, 0
-svc_stack_top:
- .space 8, 0
-
//
// System mode stack
//
@@ -112,9 +107,6 @@ $exceptions_load_stacks:
mov r0, # ARM_MODE_UND
ldr r1, = undef_stack_top
bl set_stack_for_mode
- mov r0, # ARM_MODE_SVC
- ldr r1, = svc_stack_top
- bl set_stack_for_mode
$exceptions_install_handlers:
mov r0, # ARM_EVECTOR_PABT
adr r1, pabt_handler
@@ -262,7 +254,7 @@ null_handler:
//
.macro enter_sys scratch
clrex
- mov \scratch, #(CPSR_IF_MASK | ARM_MODE_SYS)
+ mov \scratch, #(CPSR_IF_MASK | ARM_MODE_SVC)
msr cpsr_c, \scratch
init_sys_pic_register
init_sys_stack
Omap specific code (I don't have pandaboard platform, so following code has not been tested yet)
--- a/kernel/arch/???/boot.S
+++ b/kernel/arch/???/boot.S
@@ -24,7 +24,7 @@ start:
//
mrs r3, cpsr
bic r3, r3, #ARM_MODE_MASK
- orr r3, r3, #ARM_MODE_PRIV // Ensure in privileged mode
+ orr r3, r3, #ARM_MODE_SVC // Ensure in privileged mode
msr cpsr_c, r3 // _c => don't change cond. codes
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