[Oberon] Porting FPGA Oberon to new boards.

[Chris Burrows]

> -----Original Message-----
> From: Srinivas Nayak [mailto:sinu.nayak2001 at gmail.com]
> Sent: Thursday, 6 March 2014 1:48 PM
> To: paulreed at paddedcell.com; ETH Oberon and related systems;
> joerg.straube at iaeth.ch
> Subject: [Oberon] Porting FPGA Oberon to new boards.
> 
> Dear All,
> 
> Collected few points from our last discussions, that we should look at
when
> we think of porting FPGA Oberon to a new board.
> 
> - Verilog tool chain support needed.
> - Need to check native clock speed of board and clock divider code.
> - New mapping of names and location of the pins, if needed.
> - Small and simple do-it-yourself-daughter boards, for SD-card hard disk,
> mouse, wireless modules, needed if not found in-built on board.
> - Minimum 1MByte (2x256Kx16) of extremely fast (10ns) old fashioned static
> RAM; memory interfacing trouble should be minimum.
> - USB programability.
> - Cheaper.
> 
> I am a novice. If missing anything, please add.

AFAIK - VGA and (optionally) a PS/2 socket for the keyboard. JTAG (as on the
Spartan-3 board) instead of USB is OK - maybe an extra cost.

Chris.