[Oberon] FPGA synthesis for nineteen Xilinx FPGAs

[skulski at pas.rochester.edu]

Hello:

I extended my study to nineteen Xilinx FPGAs. I do not have tools from
other vendors, so I could not try Altera or Lattice. Let me stay with
Xilinx. The spreadsheet is attached. There are a few interesting
observations.

1. This time I encountered a synthesis error in the Spartan-3AN series.
These are interesting chips because they include non-volatile flash
configuration memories. (Versions without flash are available as well.)
The compilation error tells that changing some firmware details cannot be
avoided, if you decide to buy a particular board from somewhere. Adjusting
the firmware is thus both expected and unavoidable. (Another reason will
be SRAM/DRAM, which is different on every board.)

2. I checked the chip availability. It turns out that older Series-3 chips
are still available. I expect them to be available for a long time despite
the fact that Xilinx is discouraging the developers from using them for
new designs.

3. The hand-solderable chips cost between $11 and $30 per chip. It tells
you how much the board will cost if you decide to assemble it by hand. Do
not charge the time you spend on soldering, because then it will be a very
expensive board indeed. But if one is willing to hand solder, then a DIY
board will cost ~$100, with parts and the PCB. It sort of tells why the
short series boards like Papilio cost, what they cost. It also tells that
the Ebay prices are not unreasonable.

Caveat: If you decide to design your own board then do not necessarily
choose the cheapest FPGA from my table. Look at the bigger picture. The
chips surrounding the FPGA will add to the cost.

4. The percentage in column 7 tells what to expect if you decide to buy a
board from Ebay. (There are quite a few boards on Ebay.) Do not buy the
FPGA that is too small for the project, plus some room for
experimentation. This table is telling what you can expect from a
particular FPGA even without compiling the firmware yourself.

I hope that armed with this compilation anyone can choose a board knowing
whether or not the FPGA is capable of running the FPGA Oberon System, and
how much elbow room still remains in the chip for experimentation.

Regards,
WOjtek
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