[Oberon] FPGA - SRAM vs. BRAM

[Jörg]

Hi Bernhard

Principally, I guess this is possible.

The description says:
"The Block Memory Generator can generate memory structures from 1 to 4096
bits wide, and 
at least two locations deep. The maximum depth of the memory is limited only
by the 
number of block RAM primitives in the target device"

So for PO-2013, we would need 1M x 32 bits = 32 Mbits 
Remark: PO-2013 uses BRAM already for the ROM (1K x 32 bits) to store the
Bootloader.

Unfortunately, my "target device" Spartan-6 LX45 on the Pipistrello board
only has 116 x 18 kbit = ~2 Mbit :-(

br
Jörg

-----Original Message-----
From: Treutwein Bernhard
[mailto:Bernhard.Treutwein at Verwaltung.Uni-Muenchen.DE] 
Sent: Donnerstag, 23. April 2015 14:48
To: 'oberon at lists.inf.ethz.ch'
Subject: [Oberon] FPGA - SRAM vs. BRAM

I found the following documentation about generating BRAM in Spartan-6
devices
http://www.xilinx.com/support/documentation/ip_documentation/blk_mem_gen/v7_
2/pg058-blk-mem-gen.pdf which appears to be an alternative to using SRAM.

What about using it for PO-2013?





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