[Oberon] ProjectOberon on FPGA

[Jan de Kruyf]

yep, its the whole purpose of all this noise.
But the bram on the targetboard that started the discussion is a bit small,
so back to software we go.
Perhaps we need to look again which board to use.

cheers,
j.



On Fri, Aug 28, 2015 at 10:26 PM, Walter Gallegos <walter at waltergallegos.com
> wrote:

> I read several post about RISC5, FPGA, BRAM, FLASH, etc.
>
> My point is, software guys need redirect your minds when in FPGA arena due
> the new resources available; new issues and challenges too.
>
> We are in the programmable logic world; so, limit our horizon to software
> only solutions is a big mistake.
>
> Trying to illustrate with an example, a bootloader is a typical software
> solution.  The usual way to do this in FPGA is by JTAG, the TAP
> controller -available in any FPGA- is connected to the BRAMs, or to a FLASH
> controller, to load new memory contents. This is the way how are working
> JTAGLoader in PicoBlaze and indirect programming in XILINX.
>
> Regards,
>
>
>
>
>
>
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon
>
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