[Oberon] Oberon RS232 - file exchange with Linux / OLR for RPI

[Magnus Karlsson]

For more info about I2C on Oberon FPGA (including Verilog code) see this 
forum thread:
http://saanlima.com/forum/viewtopic.php?f=14&t=1289#p1739

The I2C controller is modeled after the one found in NXP's ARM Cortex 
processor
(same control register, same status codes), however only master mode is 
implemented.

Magnus

On 4/5/2016 7:14 AM, Chris Burrows wrote:
>> -----Original Message-----
>> From: Oberon [mailto:oberon-bounces at lists.inf.ethz.ch] On Behalf Of
>> thomas.kral at email.cz
>> Sent: Tuesday, 5 April 2016 8:25 PM
>> To: ETH Oberon and related systems
>> Subject: [Oberon] Fwd: Re: Oberon RS232 - file exchange with Linux /
>> OLR for RPI
>>
>> I2C is great, I have seen your excellent work implementing it on
>> FPGA.
> Actually most of the credit should go to Magnus - he wrote the Verilog part of the I2C interface for the Pepino board. I just ported the Oberon interface code and example from the ARM Cortex implementation.
>
>> I am no use with u-electronics. I was explained that I2C allows
>> adding of addtional devices (beyond a networking module) to the board
>> on a de-facto bus.
>>
>> Does it interface to FPGA board using GPIO?
>>
> Not exactly. There are dedicated 'registers' for the I2C interface. It uses two of the spare pins (+ power and GND) in the Pepino socket that can otherwise be used for GPIO (or SPI for that matter). That is one of the advantages of the FPGA boards over the hardwired MCU boards. You aren't restricted to the connections that the hardwire designer decided. Often you can reassign a spare pin on an FPGA-based board for another purpose just by changing a line in the Verilog 'ucf' constraints file.
>
> Regards,
> Chris Burrows (not Chris Glur)
>