[Oberon] Oberon-2 on FPGA

Uwe Bannow ubannow at gmail.com
Sun Oct 30 21:39:13 CET 2016


Howdy,

so being a reader on this mailing list for now, just a quick remark
regarding the "Mac using SRAM":

On Oct 30, 2016 8:32 PM, "chris" <chris at gcjd.org> wrote:
>
> On Fri, 28 Oct 2016 11:24:29 -0700, Magnus Karlsson wrote:
> > Hope this makes sense.  For more info see
> > https://github.com/mist-devel/mist-board/tree/master/cores/plus_too
>
> Thanks for your explanations. They make sense to me. I am still
> confused about one thing because in your earlier mail you said
>
> > SRAM (the kind of RAM that both the Mac and RISC5 uses).
>
> From my current understanding the SRAM (Static RAM) is a special
> feature of the Oberon FPGA not found in many boards - and certainly not
> in Mac.

The "Mac" relates to an FPGA implementation/emulation of the Mac Plus on
the Pepino board using the same SRAM extension as the RISC5  in context of
this discussion rather than the original Mac (Plus) design by Apple.
>
> Sorry for the nit-picking I am a software guy trying to follow the FPGA
> discussion here as far as I can and this threw me off.
>
> Greetings, chris
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.inf.ethz.ch/pipermail/oberon/attachments/20161030/f56f8655/attachment-0001.html>


More information about the Oberon mailing list