[Oberon] Unexplained operation code

[Walter Gallegos]

Opps, yes you are right, even after writing the VHDL code

regMux <=dataInput WHENopLDR ='1'ELSE
RESIZE(SIGNED('0'&pcNext &"00"), regMux'LENGTH) WHEN((opBR ANDv))='1'ELSE
aluRes(31DOWNTO0);

I did not think on that!

Thank you,

Walter

El 20/09/18 a las 10:48, Chris Burrows escribió:
>> -----Original Message-----
>> From: Oberon [mailto:oberon-bounces at lists.inf.ethz.ch] On Behalf Of
>> Walter Gallegos
>> Sent: Thursday, 20 September 2018 10:29 PM
>> To: ETH Oberon and related systems; Walter Gallegos
>> Subject: [Oberon] Unexplained operation code
>>
>> I'm finding the source of an unexplained operation code generated for
>> debug my VHDL sources, cleaning unrelated code I wrote :
>>
>> MODULE*  TestA;
>>       IMPORT SYSTEM;
>>
>>       VAR
>>           a: INTEGER;
>>
>>         PROCEDURE* IntServ;
>>         BEGIN
>>         END IntServ;
>>
>> BEGIN
>>       a := SYSTEM.ADR(IntServ);
>> END TestA.
>>
>>
>> a := SYSTEM.ADR(IntServ); is generated as :
>>
>> 19    F7000000    BL    0
>> 20    40F90030    SUB    R0    LNK    48
>> 21    A0D00000    STR    R0    SB    0
>>
>> I can't explain the line 19.
>>
> It is the (sneaky) RISC5 way of obtaining the value of PC. BL 0 stores the
> value of PC+1 in the LNK register (R15) and then just branches to the next
> instruction.
>
> Regards,
> Chris
>
> Chris Burrows
> CFB Software
> http://www.astrobe.com/RISC5
>
>
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon
>
-- 
Walter Daniel Gallegos
Programmable Logic
Consultorí­a, Diseño, Entrenamiento.
walter at waltergallegos.com | www.waltergallegos.com
Tel +598 26 23 44 60 | Cel +598 99 18 58 88
Montevideo, Uruguay

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