[Oberon] What is the status of Lola-2 and its useintheFPGAversion ofProject Oberon?

[rochus.keller at bluewin.ch]

@Wojtek:

Thank you for your comments.

> The high level constructs are coded as behavioral

Agree, but I think this could easily be implemented in Lola by adding more freatures from Oberon. Both Verilog and VHDL were initially designed for other purposes than synthesis which explains why many constructs are so unwieldy and counterintuitive and why people have to bother with synthesizable subsets and compiler-dependent coding idioms to control their design. If you use Verilog on behavioral/algorithmic level it's for many people quite a surprise what comes out. What a compiler does is neither intuitive nor standardized. With a language like Lola which focusses on synthesys ab initio this is much more intuitive and I'm convinced that this intuitive way could be maintained when extending the language by behavioural/algorithmic constructs. Don't you think?

> They contain many configurable blocks ("hardened logic") which can hardly be described by RTL assign statements.

Agree, but they can be represented as external modules as proposed by Paul Reed.

> You basically tell the compiler "here is what I intend, go and figure it out"

That would be the goal; unfortunately you have to use yet another layer of indirection when you want to represent your intention in Verilog.

> Is there any special reason to not change Lola such that the main cause is just eliminated?

That's a valid question. The answer should be pragmatic.

Best
R.