[Oberon] What is the status of Lola-2 and its use in the FPGA version of Project Oberon?

[rochus.keller at bluewin.ch]

@Wojciech Skulski

Thanks for the document. 

Here are two links that might also help to illustrate your argument:
https://www.vlsifacts.com/different-coding-styles-verilog-language/
https://www.researchgate.net/publication/3646848_Behavior_to_structure_using_Verilog_and_in-circuit_emulation_to_teach_how_an_algorithm_becomes_hardware

Here is yet another link to an article I got from Pablo which illustrates what was intended by Lola-1 (presumably in contrast to Lola-2): http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.51.643

Best
R.