[Oberon] Cheap chinese FPGA board - is it usable for PO?

[D EMARD]

HI

We have on ULX3S FPGA tried oberon and it works nice
on 32MB SDRAM at oberon's simple risc CPU, clock 25MHz.
It's not directly compiled from lola2 but has interventions in
verilog and vhdl for cache and sdram driver but I guess it's
easy to start with.

A downside is that ether PS/2 mouse or keyboard
(not both at the same time) can be connected
on micro-usb OTG port. Some PMOD PS/2 header from
ebay could allow to connect both at the same time


On 11/11/19, Paul Reed <paulreed at paddedcell.com> wrote:
>
>> If you want to benefit from instruction cache, the compiler could
>> start inlining procedure calls if the procedure’s code fits in the
>> instruction cache. This code optimization is only possible if you
>> adapt the compiler.
>
> And that's not the only advantage of inlining; as was recently pointed
> out to me for example, it allows you to benefit from optimisations not
> normally available, such as a function which divides by varying powers
> of two without, itself, laboriously separating these cases.
> --
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>