[Oberon] Module aliases - what is the correct way to handle them

Andreas Pirklbauer andreas_pirklbauer at yahoo.com
Sat Feb 15 01:19:13 CET 2020

    > > FULLY KNOWING that it is unnecessarily restrictive (one cannot, for 
    > > example, compile "IMPORT Z := M0, M0 := M1 in test module M5). 
    > >
    > Unnecessarily? 

You’re right. One can argue that this should in fact be the *desired* behaviour.
It is one of the reasons why I currently have this in my own implementation
(the other one being that it has a real simple implementation).

But then “the community” argued that one should in fact comply with the
language spec which has no such restrictions.

But I wondered whether there is in fact a way to implement the “full
thing” (irrespective of whether one believes it is the right thing to do
or not) in a *simple* way - and in the process even remove the
one remaining restriction of FPGA Oberon, which is that
explicit imports have to come before re-imports.

Well, I am now down "25 lines more than FPGA Oberon". See ORB12.Mod
or higher of github.com/andreaspirklbauer/Oberon-test-module-aliases .

I still have not adopted it. But if someone wants the full thing. There it is.

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