[Oberon] Interfacing with Foreign Systems

[Jörg]

Hi Paul

    At the same time, every opportunity was taken to simplify and clarify, 
    and get rid of quirks from older days.  For example, it's now an entire 
    system built from the ground up in a clear and obvious high-level 
    language - no assembler any more.

I know what you mean and you're right. Even the bootloader is written in Oberon!
If you look at the compiler itself, some parts of the compiler Oberon code look to me a little bit like "inline assembler":

PROCEDURE StringRelation*(op: INTEGER; VAR x, y: Item);   (* x := x < y *)
    (*x, y are char arrays or strings*)
  BEGIN
    IF x.type.form = ORB.String THEN loadStringAdr(x) ELSE loadAdr(x) END ;
    IF y.type.form = ORB.String THEN loadStringAdr(y) ELSE loadAdr(y) END ;
    Put2(Ldr+1, RH, x.r, 0);
    Put1(Add, x.r, x.r, 1);
    Put2(Ldr+1, RH+1, y.r, 0);
    Put1(Add, y.r, y.r, 1);
    Put0(Cmp, RH+2, RH, RH+1);
    Put3(BC, NE, 2);
    Put1(Cmp, RH+2, RH, 0);
    Put3(BC, NE, -8);
    DEC(RH, 2); SetCC(x, relmap[op - ORS.eql])
  END StringRelation;

When I added the missing numeric CASE to the compiler I used this "inline assembler" technique intensively:

PROCEDURE CaseHead*(VAR x: Item; VAR L0: INTEGER);
	BEGIN
		load(x);				(* value of CASE expression *)
		L0 := pc;
		Put1(Cmp, RH, x.r, 0);		(* check for jump table size, fixup in CaseTail *)
		Put3(BC, CC, 0);			(* jumps to ELSE, fixup in CaseTail *)
		Put1(Add, x.r, x.r, 0);		(* add nbr of instr between BL and jump table, fixup in CaseTail *)

		Put1(Lsl, x.r, x.r, 2);		(* multiply expression+offset by 4 *)
		Put3(BL, 7, 0); 			(* LNK := PC+1. The added offset counts from here *)
		Put0(Add, LNK, LNK, x.r);
		Put3(BR, 7, LNK);
		DEC(RH)
	END CaseHead;

br
Jörg

Am 01.05.20, 01:44 schrieb "Oberon im Auftrag von Paul Reed" <oberon-bounces at lists.inf.ethz.ch im Auftrag von paulreed at paddedcell.com>:

    Hi Liam,
    
    > I am not very interested in emulating the original
    > hardware, but if I was, I can do that in software on multiple host
    > systems. I think it's an impressive feat, but mainly of historical
    > interest.
    
    Our effort was not to emulate the original hardware, but rather to get 
    Oberon running on simple, modern, cleanly-designed hardware.  Since none 
    could be found, Prof. Wirth adapted his own (previously virtual) RISC 
    processor, using an FPGA as a means to that end.
    
    
    Cheers,
    Paul
    --
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