[Oberon] Project Oberon running from LPDDR memory on Pipistrello

[Magnus Karlsson]

Oh, so it is/was a bug in the risc5 verilog code.

I actually got the RISC5 source code from emard 
(https://github.com/emard/oberon) where the cpu clock enable signal was 
added.
I agree, updating to the latest version would be good.  I will pick it 
up from Project Oberon and create a new bit file.

Magnus


On 5/11/2020 1:37 AM, Paul Reed wrote:
> Hi Joerg, Magnus,
>
> Surely that's to do with data access not jumps?  But anyway, I believe 
> updating the Verilog will indeed fix the 2MB problem, it did for me.  
> I think the bug you found was to do with type descriptor access off a 
> pointer, which was fixed a while back. Apologies for this!
>
> Hope that helps - and thanks for your efforts!
> Paul
>
>
>
> On 2020-05-11 09:31, Jörg Straube wrote:
>> Magnus
>>
>> Don’t know if this is the culprit:
>>
>> There was this line in the RISC5.v you used:
>>
>> assign adr = stallL ? B[23:0] + {4'b0, off} : {pcmux, 2'b00};
>>
>> For backward jumps this would be better
>>
>> assign adr = stallL ? B[23:0] + {{4{off[19]}}, off} : {pcmux, 2'b00};
>>
>> I’m in the process to verify and will include the newest
>> enhancements and bug fixes in the Verilog files. (rounding error in
>> floating points, new shifter and registers…) and compiler.
>>
>> br
>>
>> Jörg