[Oberon] Re (2): Oberon history.

Pablo Cayuela pablo.cayuela at gmail.com
Sat Jan 2 21:24:47 CET 2021

 Dear Peter,

I've written an email to Udo Möller asking about his project of Ceres on
FPGA and I'm waiting for his reply.

Despite that, the site have some info on advances:

> The easiest way is for someone with a working Ceres to donate the boot
> software. I don't know any individual possessing a Ceres.  Probably a
> few remain in Europe.  The Computer History Museum has more than one.
> A person living near the museum can become a member and initiate
> restoration of a Ceres to working condition.  Then the boot code will
> be accessible.
For the remaining Ceres:
"I visited the ETH Zürich in May 2012...
The first Ceres machine was based on the NS32032 CPU. Not surprisingly no
machine has survived more than 25 years."
He found some Ceres-2 and one Ceres-3 stored. And he mentioned:
"At least one other Ceres-3 workstation survived and is still functional.
The owner promised me to power-up the system from time to time to check if
it is still ok. "
But don't disclose who.

> The Oberon sources are in the original Project Oberon book.
I guess the original printed one for the correct Ceres version. He mentions
surprisingly in:
*"... Professor N. Wirth in the 1980's. He wrote a book about Oberon which
contained the source code of it! Unfortunately I still don't have the book"
It seems that his plan is to reproduce the Ceres from ROM contents:
*"What I have is the EPROM content of two Ceres-3 machines. Surprisingly
they are different. Together with the description of the Ceres-3 it should
be possible to rebuild such a system based on the M32632 CPU. This will be
a nice project to do" *

> If you want to take a sabbatical year or so in California, there is a
nice possibility.
Oh! That thing does not exist in our University. It would be wonderful but
I have no possibility. With a family with two children (2 y-o and a newborn
baby girl), and an income of less than 12 thousand USD per year, I do not
even have the chance of visiting by myself just for fun.

> Another possibility: the Web site you mentioned has an interesting
> page describing computers built with wirewrap and with breadboard
> wiring. http://www.cpu-ns32k.net/Gilbert.html Hypothetically, there is
> a possibility of recreating a Ceres machine.

He is announcing a future implementation of Ceres!

*"Milestone 6 : TRIPUTER V2.0 is available. *

*Description: TRIPUTER V2.0 will contain the Ceres-3 and the PC532.  *

*Status: to be done.  *
*This chapter was last modified on 13 December 2020."*

> A further possibility: the Web site you mentioned has an interesting
> page about implementing(?) a NS 32xxx in FPGA.
> http://www.cpu-ns32k.net/FPGA.html <http://www.cpu-ns32k.net/FPGA.html>

He published the M32632, a Verilog SOC compatible to the NS32532 CPU and
the NS32381 FPU, on 2 December 2018 - release of version 3.0
It is not up to date because recently (December 2020) he has finished a new
version working in a so-called Triputer, mentioned on:

*"December 2020 : TRIPUTER V1.1 is available.TRIPUTER V1.1 fixes two bugs
in the Ethernet unit for NetBSD, adds a second disk drive for NetBSD and
includes a statistic unit. The V1.1 zip archive contains seven files:
TRIPUTER_V11.sof , the FPGA configuration    TRIPUTER_V11.pof , the flash
configuration    TRIPUTER_V11.pdf , the User Manual    monitor.32K , the
source code of the TRIPUTER MONITOR program    gen_output.cof , the control
code for the generation of the pof file    include.hex , the software being
included in the pof file    statistic.c , demo program for NetBSD for use
of statistic unit"*

Best regards,
Pablo Cayuela

On Sat, Jan 2, 2021 at 2:29 PM <peter at easthope.ca> wrote:

> For me there are two constraints.  Information.  Time. Certainly a
> chapter about Ceres would be desirable.
> ...
> Regards,                                 ... P. L.
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