[Oberon] Good News on Ceres-3 recreated on FPGA

[Pablo Cayuela]

This project of Ceres on FPGA by Udo Möller was mentioned many times
on the list.
There is some good news on it.
http://www.cpu-ns32k.net/News.html

The Ceres-3 is finally working on an FPGA board featuring a Verilog
version of the NS32k CPU used in the original hardware:
http://www.cpu-ns32k.net/TRIPUTER.html#Ceres
Ceres-3 in Action, Fig. 10 of
http://www.cpu-ns32k.net/Ceres.html
http://www.cpu-ns32k.net/images/Ceres-3-5.jpg

At "The Web Site to Remember National Semiconductor's Series 32000 Family"
http://www.cpu-ns32k.net
you can find many retrocomputing projects that Udo Möller has built
along the years,
http://www.cpu-ns32k.net/TITAN6.html
http://www.cpu-ns32k.net/TRIPUTER.html
featuring his own reconstruction of the NS32k family of CPUs
functionality in Verilog based only on the documentation manuals of
the chips.
His design is called the M32632,
http://www.cpu-ns32k.net/Overview.html
http://www.cpu-ns32k.net/Architecture.html
and it is working on a series of Altera FPGA boards,
http://www.cpu-ns32k.net/Devhard.html
that anyone could use:
http://www.cpu-ns32k.net/Getting.html
I even port one of his initial versions of the M32632 to a Xilinx FPGA
(Digilent Nexys4 board) but not the complete Ceres-3 project.

I hope you find this news interesting.

Best regards,
Prof Pablo Cayuela
Argentina