[Oberon] The 2013 Project Oberon System running on RISC-V instead of RISC-5

Michael Engel engel at multicores.org
Wed Aug 5 19:26:15 CEST 2026


Hi Rochus,

great work – looking forward to experiment with it.!

Fyi, my former student Rikke Solbjørg at NTNU in Trondheim built something similar in 2021, a port of Project Oberon to RV32IM based on Samuel Falvo's RISC-V compiler and Peter de Wachter's Project Norebo:

https://github.com/solbjorg/oberon-riscv
https://github.com/solbjorg/oberon-riscv-emu

Great to see that there are still new developments around Oberon!

Best,
    Michael
 

> On 5. Aug 2026, at 16:11, Rochus Keller <me at rochus-keller.ch> wrote:
> 
> Hello everyone
> 
> In case anyone is interested, I recently migrated the Project Oberon System available on http://www.projectoberon.com
> to Oberon 90 so it compiles with my OP2 version with the RISC-V backend. The project also includes
> a virtual machine similar to the architecture Wirth described in his new version of the Project Oberon book, but using 
> the RISC-V instead of the RISC-5 instruction set. 
> 
> See https://github.com/rochus-keller/OberonSystem/tree/op2-rv32  for more information. There is a precompiled
> version for Linux x64 so far.
> 
> Best regards
> Rochus Keller
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon



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