[Oberon] What is the status of Lola-2 and its use in the FPGA version ofProject Oberon?

[Chris Burrows]

> -----Original Message-----
> From: Oberon [mailto:oberon-bounces at lists.inf.ethz.ch] On Behalf Of
> Skulski, Wojciech
> Sent: Friday, 15 March 2019 3:08 PM
> To: ETH Oberon and related systems
> Subject: Re: [Oberon] What is the status of Lola-2 and its use in the
> FPGA version ofProject Oberon?
> 
> > 2. Not so much to be gained translating from one language to
> another
> > that is very similar? i.e. There is less need to try to make VHDL
> more palatable.
> 
> With a bit of effort both languages translate between themselves one-
> to-one. 

I didn't mean translating VHDL <--> Verilog. I meant choosing between:

  Translating Lola-2 -> Verilog  (different style - more to be gained)
  Translating Lola-2 -> VHDL     (similar style - less to be gained)

Chris.