[Oberon] What is the status of Lola-2 and its use in the FPGA version ofProject Oberon?

Nemo cym224 at gmail.com
Fri Mar 15 15:03:03 CET 2019

On 15/03/2019, Skulski, Wojciech <skulski at pas.rochester.edu> wrote (in part):
> The Verilog/VHDL chasm is rumored to be a communal thing.

Off-topic (and apologies for the irrelevance) but perhaps worth noting
that Verilog started out as a proprietary language until Cadence
released it to ISO, whereas VHDL started in IEEE.


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