[Oberon] Oberon on ULX3S explanation

D EMARD vordah at gmail.com
Thu Nov 14 21:57:26 CET 2019

Well it is known from other projects like minimig - amiga emulator
for example, SDRAM access time is fast enough for the sprites,
DDR3 is not, amiga will boot but sprites won't work

On 11/14/19, Skulski, Wojciech <skulski at pas.rochester.edu> wrote:
>>See, dynamic RAMs are actually kinda block devices similar to SD
>>cards, only "blocks" are different at SDRAM and DDR. Access times
>>for single cell are the same 70-80ns silicon tech limit, only block
>>sizes differ. For DDR, you can address and read 1K bytes or 1 byte
>>- it will take the same time
>> For SDRAM the break-even is around 4-16 bytes depending on the driver.
> Thank you for the info. It would be good to know the actual random access
> time in a practical system using SDRAM. The numbers which we get from the
> chip data sheets are not necessarily realized in practice. If you could
> somehow gather this info then we would have at least one data point.
> Thank you,
> Wojtek
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon

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