[Oberon] RISC5

[Chris Burrows]

> -----Original Message-----
> From: eas lab [mailto:lab.eas at gmail.com]
> Sent: Wednesday, 16 April 2014 5:00 PM
> To: ETH Oberon and related systems
> Subject: Re: [Oberon] RISC5
> 
> Let me admit, that I have lost understanding of the overall structure of
how
> the V5 project is developing.
> 
> So here's my attempted framework, which can be corrected, so that we all
> understand the structure.
>
...
...
> 
> A minimalist, custom CPU was designed, to implement 'Oberon'.
> Apart from the ALU, it would also need I/O & memory.
> 
> Such hardware can be built in FPGA, ASICs, ...etc. Call it V5.

Correct. It was designed for, and has been fully implemented on, an FPGA
processor. 

> It seems that the intended hardware became unavailable?

As far as I know it has only been implemented on one development board so
far - the 'Spartan 3' from a company called Digilent. Since then the
manufacturer of that board has stated they are not going to produce any
more. However, they are still currently listed in stock from retailers so it
might be some time before they disappear forever. 
 
> But since substantial new software was designed, e.g. the code-generation
> specifically for V5, part of the compiler; there must have been some
'real-
> live' V5 hardware, to test the code?
> 

Absolutely - Wirth isn't just a theoretician. I was not involved in the
development of the system but I now also have it running on the real FPGA
hardware and have seen reports of others doing the same. Anybody else can do
the same just by following the instructions on the www.projectoberon.com
website.

> Is this project getting out of control and potentially destroyed, eg. by
> spurious complexity: floating point technology ....?
> 

The FPGA implementation of the project is well under control. The floating
point technology used is based on the IEEE standard and well-proven. The
subtleties of floating point arithmetic has always been one of the more
difficult computing science topics, but it is too important to be ignored by
the target audience of this project. Without proper floating point
facilities it would have been difficult to have taken the project seriously.

> Who's going to write a clear/Wirthian explanation of how all the stages
fit
> together?

It has been done. The entire project is already extensively documented in
the clear Wirthian style: 

http://www.inf.ethz.ch/personal/wirth/

All that remains to be done is for people to read those documents. To get
the whole picture and a complete understanding of how the system works, the
documents in the other areas of Wirth's website should be read, not just
those in the Project Oberon section.

Regards,
Chris Burrows

CFB Software
Astrobe: Oberon development system for ARM and Cortex-M3
http://www.astrobe.com