[Oberon] RISC5 implementation issues.
Steven Hirsch
snhirsch at gmail.com
Thu Feb 18 02:29:05 CET 2016
On Wed, 17 Feb 2016, jwr at robrts.net wrote:
> Regarding continuing the discussion of FPGA and RISC5 implementation issues
> by private email vs on this list vs elsewhere, I for one would like to have
> the discussion continue in a somewhat public forum, so that those of us
> interested in learning more about the Project Oberon FPGA implementation and
> related hardware aspects, as well as more general FPGA implementation
> concerns, can follow along and learn.
I concur. I'm learning a lot from the discussion.
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