[Oberon] FPGA - JTAG programming

[Uwe Bannow]

True if written into the FPGA only. However, if written to a SPI Flash
(chip  via the FPGA) then only
up to 100,000 times.  At least that's what most SPI Flash
manufacturers (100,000 Program-Erase
Cycles) specify for their SPI Flash chips.

Uwe

Am Mo., 21. Jan. 2019 um 22:52 Uhr schrieb Skulski, Wojciech
<skulski at pas.rochester.edu>:
>
> Infinity.
> ________________________________________
> From: Oberon [oberon-bounces at lists.inf.ethz.ch] on behalf of Tomas Kral [thomas.kral at email.cz]
> Sent: Monday, January 21, 2019 4:24 PM
> To: Oberon at lists.inf.ethz.ch
> Subject: [Oberon] FPGA - JTAG programming
>
> Hi,
>
> I often change between different FPGA bit files, doing soft
> reprogramming the chip. Just wondering, how many reprogrammings the
> Xiling chip can take? Is there a physical limit?
>
> --
> Tomas Kral <thomas.kral at email.cz>
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